Current trends in electronics compel professionals to maximize the use of limited measurement budgets by optimizing instrumentation performance. A thorough understanding of existing measurement solutions and their capabilities is essential for shortening the design/development and testing cycle, as well as for obtaining accurate and successful results.
Precise characterization of connectors, cables, interconnects, printed circuit boards (PCBs), and PCB packages, among other components, designed to operate at current speeds, requires parametric measurements such as impedance/delay (time domain) and return/insertion loss (frequency domain).
As bit rates increase in high-speed digital applications, the signal integrity of all interconnects, cables, transmitters, and receivers dramatically impacts system performance. Ensuring product reliability and compliance with current and future high-speed communication standards demands even more rigorous and complex measurements.
Another challenge lies in translating the measurement results obtained into how our point-to-point link will behave and what the eye diagram will look like at the end of that link. Even knowing the eye diagram at the transmitter output, accurately determining the contribution of our components to signal integrity is very difficult if we rely solely on traditional impedance/delay and return/insertion loss measurements.
This seminar will explain the fundamentals of the various existing measurement tools in an accessible way and will focus on innovative TDR/TDT techniques based on vector network analyzers (VNAs). These techniques will help us understand how our cable, connector, PCB, etc., will behave in terms of time/frequency parameters and signal integrity. The seminar will also cover the different options for production environments where the total cost of the solution and test speed are critical factors.
The seminar agenda will be as follows:
09:00 – 09:15 Presentation and Welcome
09:15 – 10:30 Measurement Fundamentals and Methodologies: Time and Frequency
10:30 – 11:00 Coffee
11:00 – 12:15 TDR/TDT based on a Vector Network Analyzer
12:15 – 13:00 PCB Analyzer – High Performance, Low Cost
13:00 Closing
Registration for this seminar is free and the number of places is limited.
