The system is ideal for original equipment manufacturers (OEMs) who have to work with limited printed circuit board space across multiple sectors, including telecommunications and networking, the military, medical electronics, and consumer technology. The stacking height of 4.00 mm to 10.00 mm, along with the 0.80 mm pitch, gives design engineers maximum flexibility to address space constraints without compromising performance.The SpeedStack connection system is available in multiple circuit sizes (22, 44, 60, 82, 104, and 120), with a range of 6 to 32 differential pairs for even greater flexibility. The 100-ohm impedance design allows for excellent impedance control. An 85-ohm version, compliant with PCIe* Generation (Gen) 3.0 and Intel QuickPath Interconnect (QPI) requirements for next-generation memory and I/O signaling, is planned for release in June 2013. The insert-molded wafer design includes a protective enclosed housing and contributes to improved electrical balance by supporting the pin placement. A common ground pin helps improve electrical performance and minimize interference.
