TeraSquare’s CDR-TS-CM44013 pulverizes integrated circuit (IC) power consumption to as low as 0.75W, compared to the average CFP4 level of 3.5W. It requires no timer reference and has built-in JTOL test capability, eliminating the need for expensive external test equipment.
“Our new IC is truly revolutionary, and we are very excited to be able to demonstrate this at ECOC, where it has been exhibited for the first time,” commented Dr. Jinho Park, CTO at TeraSquare.
“It is, by a considerable margin, the lowest power solution the market has ever seen, and this critical requirement is just one of the key features that we believe makes our new development so important worldwide.”
TeraSquare's 100 Gb/s parallel CDR delivers 25.0 to 28.3 Gb/s per channel in a standard 8 mm x 8 mm BGA package for CFP4/QSFP28 modules and supports IEC-28G-VSR specifications. Not only is it an innovative IC due to its low power consumption, but it also features a reference-free mode and jitter-filtered operation without the need for an external filter capacitor. The IC also includes integrated JTOL testing capabilities and a PRBS generator, and was demonstrated at TeraSquare's booth at ECOC.
TeraSquare also introduced its second product, a 100 Gb/s reverse-switching CDR (10x10 Gb/s and 4x25 Gb/s) that fully supports OIF MLG1.0/MLG2.0 and IEC-28G-VSR for CFP4/QSFP28 modules. This product has all the features of TeraSquare's 100 Gb/s parallel CDR (TS-CM44013) and consumes only 1.1W. The first samples will be available in February 2014.
Founded in December 2010, TeraSquare strives to be a leading company in the field of 100 Gbps Ethernet IC design. Undoubtedly a very promising market in the near future, 100 Gbps Ethernet IC design is a challenging field that demands a high level of expertise and capability possessed by only a select group of aspiring vendors. With the ever-increasing demand for high-speed Ethernet solutions in the IT industry, TeraSquare is preparing to fulfill its goal of becoming a leading provider of high-speed Ethernet ICs, as well as other high-speed integrated circuits.
Dr. Jinho Park has over 10 years of experience in the design and mass production of high-speed, low-power CMOS circuits. In his previous role as Senior Design Manager at Marvell in Silicon Valley, Dr. Park built and led a 30-PhD research and development team that achieved the world's first analog and RF design of an 802.11ac mobile MIMO IC. With over 40 patents related to high-speed analog circuits and systems to his name, Dr. Park is the driving force behind TeraSquare's innovative designs in competitive products.
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