The CXL 2.0 Memory Module offers an E3.S form factor, based on the EDSFF standard, thus enabling dynamic resource management.
The CXL memory module connects via the PCIe 5.0 interface. This high-speed connection ensures that data transfer remains fast and efficient, even when expanding memory across different systems. The PCIe 5.0 interface reaches speeds of up to 32 GT/s per channel, enabling the CXL memory module to provide the necessary bandwidth for data-intensive applications.
CXL 2.0 allows multiple hosts to access shared memory. Using CXL's memory pooling technology, computing components such as CPUs and accelerators from multiple servers located in the same cabinet can share memory resources.
The CXL memory module can be added to or removed from the system without powering down the server, allowing for on-the-fly memory expansion.
Key features:
EDSFF E3.S 2T form factor
CXL 2.0 supports PCIe-Gen5 speeds up to 32 GT/s
Supports ECC error detection and correction
Printed circuit board: 30μ' gold plated
Operating environment: 0 ~70°C (Tc)
Compliant with CXL™ 1.1 and CXL™ 2.0
Applications
Data centers
Machine learning
AI training
Edge processing
The first engineering samples will be ready in September 2024 and the official launch is planned for the first quarter of 2025.
