The new SimRF product enables system architects to use Simulink to design and verify complete wireless communication systems with true-to-life RF subsystem models and advanced circuit envelope and harmonic balance methods. A major update to Simulink HDL Coder adds critical path analysis and optimizations for speed and area for automatic HDL code generation, along with a new workflow wizard for FPGA-based implementations. Enhancements to the Communications Blockset, Signal Processing Blockset, and Video and Image Processing Blockset add more than 250 new algorithms to MATLAB for data streaming processing. MathWorks' C code generation tools now support Eclipse IDE, Embedded Linux, ARM processors, and the SystemC TLM 2.0 standard. Together, these new features enable more advanced system analysis earlier in the development phase, optimize algorithm design and implementation, and provide easy integration with widely used tools and standards.
“Wireless communication, sensor processing, and streaming capabilities are integral to today’s embedded systems, and engineers need design tools that can simultaneously simulate digital, analog, and software components,” said Ken Karnofsky, senior strategist at MathWorks. “These new features in MATLAB and Simulink unify and automate essential tasks in the systems design workflow. This is a major advancement that accelerates IP development of algorithms, system design and verification, and collaboration among engineering teams.”
Among the latest innovations for next-generation signal processing are:
• The introduction of SimRF, which brings circuit envelope and harmonic balance simulation techniques to the Simulink environment and provides a large component library for modeling RF system architectures. SimRF supports multi-frequency RF signals for various interference simulations, as well as multi-port architectures for true-to-life representations of RF transceivers. Communications system architects can now perform realistic simulations early in the development phase to design, optimize, and verify wireless systems with digital baseband, analog baseband, and RF subsystems. SimRF includes RF Blockset features. A
major update to Simulink HDL Coder automatically generates VHDL and Verilog code from Simulink models. Simulink HDL Coder now supports rapid design iterations by highlighting critical paths in the model and estimating hardware resource utilization. It also supports optimizations such as serialization, resource sharing, and pipelined code. An FPGA workflow wizard automates synthesis and deployment on Xilinx and Altera FPGAs. New verification features include code traceability compliant with the DO-254 standard.
• Enhancements to the Communications Blockset, Signal Processing Blockset, and Video and Image Processing Blockset, now featuring over 250 algorithms with a standardized interface for efficiently processing audio, video, and other streaming data in MATLAB. The resulting MATLAB programs can also be used directly in Simulink models for system design, simulation, and analysis. These algorithms are available as system objects, a new class of MATLAB objects that facilitates algorithm design and reuse.
• New support for Eclipse IDE, Embedded Linux, and ARM. MathWorks code generation products now automate the selection, real-time performance analysis, and verification of C code for the Eclipse integrated development environment (IDE), Embedded Linux, and the ARM Cortex-A8 processor. EDA Simulator Link now supports the generation of SystemC TLM 2.0 components for verification in virtual platform environments.
